"Time to retire our benchmarks" -- Rob Aitken, 2010
ITC'99 Benchmark Homepage
CAD Benchmarking Laboratory (CBL) at North Carolina State University
High Level Synthesis Resources at UCSB
Advanced EDA Benchmark Datasets
OPENCORES.ORG
Links to CAD: Commercial Software
HITEC/PROOFS: A Sequential Circuit Test Generation and Fault Simulation Package
CAD Software at University of California, Berkeley
CAD Software at Stanford University
FanWorks (ATPG for Macintosh)
SREEP (Shift Register Equivalents Enumeration and Synthesis Program)